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Reported in version: 2.0.9 Reported for operating system, platform: Other, Other
Comments on the original bug report:
On 2019-02-14 02:11:51 +0000, Dmitry Gapkalov wrote:
Hello,
with latest SDL2 changes from Hg, when I using software rendering on the BigEndian CPU, textures(created from jpeg`s) on the screen displayed with wrong colors. It looks like if some color components(RGB) is exchanged.
On 2019-02-14 08:22:00 +0000, Sylvain wrote:
Probably my last commits, haven't tested with big endian.
which hardware do you use ?
Can you help to do some check ?
Can you try this patch:
diff -r 48e26b5d4f56 src/video/SDL_blit_N.c
--- a/src/video/SDL_blit_N.c Sat Feb 09 17:40:32 2019 +0100
+++ b/src/video/SDL_blit_N.c Thu Feb 14 09:19:57 2019 +0100
@@ -2155,7 +2155,11 @@
int *_p0 , int *_p1, int *_p2, int *_p3, int _alpha_channel)
{
int alpha_channel = 0, p0, p1, p2, p3;
+#if SDL_BYTEORDER == SDL_LIL_ENDIAN
int Pixel = 0x04030201; / identity permutation */
+#else
int Pixel = 0x01020304; /* identity permutation */
+#endif
if (srcfmt->Amask) {
RGBA_FROM_PIXEL(Pixel, srcfmt, p0, p1, p2, p3);
On 2019-02-14 15:55:39 +0000, Dmitry Gapkalov wrote:
No, it doesn't help
On 2019-02-14 16:08:41 +0000, Dmitry Gapkalov wrote:
Created attachment 3611
bad pic
On 2019-02-14 17:36:16 +0000, Sylvain wrote:
Created attachment 3613
image for testcase
image for test case
On 2019-02-14 17:36:38 +0000, Sylvain wrote:
Created attachment 3614
test case
test case
On 2019-02-14 17:42:41 +0000, Sylvain wrote:
I've just uploaded my test-case and its png image
Could you try to run it with:
your previous version of SDL.
the current head of SDL (also eventually a modified on with the patch ..)
Save the full log.
It blits any format to any format, with/without colorkey.
It does a crc on each image and can help to see what's going on / regression.
(You need some other dependencies: zlib.h and also md5.h (compile with -lz -lcrypto) )
On 2019-02-14 17:51:33 +0000, Sylvain wrote:
Created attachment 3615
compare script
Here's also a script to compare two logs you would have saved.
It tells if blits get optimised and if there're crc errors.
On 2019-02-14 22:54:48 +0000, Dmitry Gapkalov wrote:
Created attachment 3617
ref and new
attached two logs:
ref.txt - reference 2.0.9
new.txt - from the latest Hg changes
3/ We should also activate the "Blit_3or4_to_3or4__inversed_rgb" in normal_blit_3 for big endian, so there is also something to fix here.
(remove ifdef, and see where it fails :)
On 2019-02-15 15:29:45 +0000, Dmitry Gapkalov wrote:
Sorry for misunderstanding, new.txt already contains your changes
+#if SDL_BYTEORDER == SDL_LIL_ENDIAN
int Pixel = 0x04030201; /* identity permutation */
+#else
int Pixel = 0x01020304; /* identity permutation */
+#endif
On 2019-02-16 03:25:43 +0000, Dmitry Gapkalov wrote:
Created attachment 3627
ref2, new and result
get new ref2.txt logs(with patches) old new.txt, and put the results.
p.s. If I uncomment #ifdef I have a crash.
On 2019-02-18 21:19:48 +0000, Sylvain wrote:
Ok, so I think I've fixed all the issues with big endian.
and enabled all the optimized routines for big endian.
I checked this with a virtual machine.
1/ Can you see if this works, and re-run the test-suite and see how it compares with the reference ?
2/ On my virtual machine, valgrind doesn't work (crashed at start, even with an helloworld). Just to make sure there is no bad access, could you run it.
with some parameters:
strange ... any subtleties with mips ?
I also ran qemu with mips eb debian and did hit this.
So with this patch, how does this behave for the full testcase ?
On 2019-02-20 08:40:37 +0000, Sylvain wrote:
mips doesn't like store on non 32 byte aligned memory probably ? And qemu doesn't simulate this.
but I would be surprised if this is the only place where there is such access.
On 2019-02-20 08:41:41 +0000, Sylvain wrote:
I mean -word- store on non 4 bytes / 32bits aligned memory
On 2019-02-20 12:17:59 +0000, Sylvain wrote:
Created attachment 3640
test case for unaligned store
to check this, can you try this test case that does non aligned int store
On 2019-02-20 15:53:27 +0000, Dmitry Gapkalov wrote:
on ARM or Mips - based systems you cannot address a 32-bit word that is not aligned to a 4-byte boundary. Doing so will result in an access violation exception. On x86 you can access such non-aligned data, though the performance suffers a little since two words have to fetched from memory instead of just one.
So it seems to be the issue!
Here's a new SDL_blit_N.c that removes the un-aligned load/store + some clean-up, please try it!
You may also need to edit the testcase and comment out the 4 calls to "remove_padding()".
It could create un-aligned access ... or maybe not since, the padding are only for particular format ).
In the compare script, if you un-comment the log faster/slower, you'll see how it improves the blit.
On 2019-02-21 17:55:06 +0000, Dmitry Gapkalov wrote:
Created attachment 3646
results
with this version all problems now is solved, all texturest displayed correctly without any artifacts.
ref4.txt - 2.0.9 with few patches
new_9.txt - latest mercury with new SDL_blit_N.c
result2.txt - results
results is little bit slower than original, but my hardware timer precision is 10ms, it maybe not enough to make correct decision.
On 2019-02-21 18:56:08 +0000, Sylvain wrote:
Ok great !
Yes the timings seem wrongs. the image was very small to run the test quickly.
The previous image is bigger so the timing should be more accurate.
On 2019-02-21 21:10:45 +0000, Dmitry Gapkalov wrote:
Created attachment 3647
result with large picture
Starting ref_3.txt new_10.txt
Reference: Time BlitNtoN : 137890 msec
Reference: Time BlitNtoNKey : 127910 msec
Current: Time BlitNtoN : 145990 msec
Current: Time BlitNtoNKey : 135720 msec
On 2019-02-22 08:35:11 +0000, Sylvain wrote:
So it's seems very bad :)
Whereas it always faster on x86, it just almost always slower in Mips.
I think the board memory is slow ? or maybe each char write is done as a int32 store maybe ?
But, I'll provide you a new modified file to see it this can be improved
On 2019-02-22 14:07:43 +0000, Sylvain wrote:
Created attachment 3648
SDL_blit_N.c
Here's a new SDL_blit_N.c
Please gives a try !
(maybe change the compare_script threshold, so that it display faster/slower when the difference is > 1.2). (low resolution, but seems quite stables).
On 2019-02-22 17:46:57 +0000, Dmitry Gapkalov wrote:
Created attachment 3649
new result
Starting ref_3.txt new_11.txt
Reference: Time BlitNtoN : 137890 msec
Reference: Time BlitNtoNKey : 127910 msec
Current: Time BlitNtoN : 136620 msec
Current: Time BlitNtoNKey : 127060 msec
On 2019-02-22 19:57:20 +0000, Sylvain wrote:
Created attachment 3651
SDL_blit_N.c
Most of regressions seems to have disappeared. There is one left which I've undefined in this new file. Can you test it to make sure?
After that,there should be no perf regression left. And there are still some faster blits case (but less).
I think it still valuable as you can get a x2 ratio if you convert a rgb24 with color-key to alpha surface.
Then, I will make this define active/un-active based on arch.
Not sure when it should disabled ... I have tried on arm, and all are ok. but I don't have very old one.
And what define can I use to make sure it selects or not your board or any MIPS ? Maybe I should disable the slower for all big endian ?
Btw, what's your board exactly so that I can the specs ?
On 2019-02-22 20:33:10 +0000, Sylvain wrote:
Created attachment 3652
SDL_blit_N.c with intermediate aligned int on stack
Can also try this SDL_blit_N.c where it uses an intermediate aligned int ? It may enable most of the optimisation !
On 2019-02-22 21:13:14 +0000, Dmitry Gapkalov wrote:
Created attachment 3653
results
Starting ref_3.txt new_13.txt
Reference: Time BlitNtoN : 137890 msec
Reference: Time BlitNtoNKey : 127910 msec
Current: Time BlitNtoN : 136510 msec
Current: Time BlitNtoNKey : 125990 msec
And what define can I use to make sure it selects or not your board or any >>MIPS ? Maybe I should disable the slower for all big endian ?
Btw, what's your board exactly so that I can the specs ?
my hardware doesn't have common specific macro to determine it.
On 2019-02-22 22:02:36 +0000, Dmitry Gapkalov wrote:
Created attachment 3654
result7
Starting ref_3.txt new_14.txt
Reference: Time BlitNtoN : 137890 msec
Reference: Time BlitNtoNKey : 127910 msec
Current: Time BlitNtoN : 151860 msec
Current: Time BlitNtoNKey : 140680 msec
Maybe the intermediate tmp[4] it's not optimized as it should be. And should be marked as
register char tmp[4]; or a global static var aligned(4) char tmp[4];
Anyway, feel free to try to optimize it if you need.
The text was updated successfully, but these errors were encountered:
This bug report was migrated from our old Bugzilla tracker.
These attachments are available in the static archive:
test case (fast_bench.c, text/x-csrc, 2019-02-14 17:36:38 +0000, 8618 bytes)compare script (compare_blitlog.py, text/x-python, 2019-02-14 17:51:33 +0000, 4498 bytes)compare script (compare_blitlog.py, text/x-python, 2019-02-15 10:13:54 +0000, 5064 bytes)SDL_blit_N.c (SDL_blit_N.c, text/x-csrc, 2019-02-20 21:40:37 +0000, 114621 bytes)SDL_blit_N.c (SDL_blit_N.c, text/x-csrc, 2019-02-22 14:07:43 +0000, 115146 bytes)Reported in version: 2.0.9
Reported for operating system, platform: Other, Other
Comments on the original bug report:
On 2019-02-14 02:11:51 +0000, Dmitry Gapkalov wrote:
On 2019-02-14 08:22:00 +0000, Sylvain wrote:
On 2019-02-14 15:55:39 +0000, Dmitry Gapkalov wrote:
On 2019-02-14 16:08:41 +0000, Dmitry Gapkalov wrote:
On 2019-02-14 17:36:16 +0000, Sylvain wrote:
On 2019-02-14 17:36:38 +0000, Sylvain wrote:
On 2019-02-14 17:42:41 +0000, Sylvain wrote:
On 2019-02-14 17:51:33 +0000, Sylvain wrote:
On 2019-02-14 22:54:48 +0000, Dmitry Gapkalov wrote:
On 2019-02-15 10:13:54 +0000, Sylvain wrote:
On 2019-02-15 10:25:50 +0000, Sylvain wrote:
On 2019-02-15 15:29:45 +0000, Dmitry Gapkalov wrote:
On 2019-02-16 03:25:43 +0000, Dmitry Gapkalov wrote:
On 2019-02-18 21:19:48 +0000, Sylvain wrote:
On 2019-02-18 21:21:06 +0000, Sylvain wrote:
On 2019-02-18 21:22:02 +0000, Sylvain wrote:
On 2019-02-18 21:22:37 +0000, Sylvain wrote:
On 2019-02-19 18:12:07 +0000, Dmitry Gapkalov wrote:
On 2019-02-19 18:15:22 +0000, Dmitry Gapkalov wrote:
On 2019-02-19 19:06:51 +0000, Sylvain wrote:
On 2019-02-19 19:55:01 +0000, Dmitry Gapkalov wrote:
On 2019-02-19 20:03:52 +0000, Sylvain wrote:
On 2019-02-19 23:39:55 +0000, Dmitry Gapkalov wrote:
On 2019-02-20 07:12:25 +0000, Sylvain wrote:
On 2019-02-20 08:40:37 +0000, Sylvain wrote:
On 2019-02-20 08:41:41 +0000, Sylvain wrote:
On 2019-02-20 12:17:59 +0000, Sylvain wrote:
On 2019-02-20 15:53:27 +0000, Dmitry Gapkalov wrote:
On 2019-02-20 21:40:37 +0000, Sylvain wrote:
On 2019-02-21 17:55:06 +0000, Dmitry Gapkalov wrote:
On 2019-02-21 18:56:08 +0000, Sylvain wrote:
On 2019-02-21 21:10:45 +0000, Dmitry Gapkalov wrote:
On 2019-02-22 08:35:11 +0000, Sylvain wrote:
On 2019-02-22 14:07:43 +0000, Sylvain wrote:
On 2019-02-22 17:46:57 +0000, Dmitry Gapkalov wrote:
On 2019-02-22 19:57:20 +0000, Sylvain wrote:
On 2019-02-22 20:33:10 +0000, Sylvain wrote:
On 2019-02-22 21:13:14 +0000, Dmitry Gapkalov wrote:
On 2019-02-22 22:02:36 +0000, Dmitry Gapkalov wrote:
On 2019-02-23 08:42:22 +0000, Sylvain wrote:
On 2019-02-23 08:48:59 +0000, Sylvain wrote:
The text was updated successfully, but these errors were encountered: